/*******************************************************************************
** Document: FW_gpio_api.h
** Copyright (c) 2004 R&D Center, Tailyn Communication Company, Ltd.  
** Created by: Chien Chung Lo
** Date: Dec. 7, 2004
** Description: Firmware GPIO API.
** Version: 0.1
*******************************************************************************/
#ifndef FW_API_GPIO_H_
#define FW_API_GPIO_H_
//----------------------------------------------------------------------
#include <umap_type.h>

//----------------------------------------------------------------------
#define GPIO_DEVICE_FILE_NAME		"/dev/w747_gpio_drv"

//----------------------------------------------------------------------
// GPIO A
#define BP_CARD_EQUIP_0			20
#define BP_CARD_EQUIP_1			21
#define BP_CARD_EQUIP_2			22
#define BP_CARD_EQUIP_3			23
#define BP_CARD_EQUIP_4			24
#define BP_HK_1				25
#define BP_HK_2				26
#define BP_HK_3				27
#define FIBRE_OPTICS_1			28
#define FIBRE_OPTICS_2			29
#define GIGA_PHY_1			30
#define GIGA_PHY_2			31

// GPIO C
#define GPIO_C_BASE			32
#define I2C_SEL				17 + GPIO_C_BASE
#define ETH_INT				20 + GPIO_C_BASE
#define BP_INT_0			21 + GPIO_C_BASE
#define BP_INT_1			22 + GPIO_C_BASE
#define BP_INT_2			23 + GPIO_C_BASE
#define BP_INT_3			24 + GPIO_C_BASE
#define BP_INT_4			25 + GPIO_C_BASE
#define ACO_BUTTON			26 + GPIO_C_BASE
#define ALARM_LED_1			27 + GPIO_C_BASE //output
#define ALARM_LED_2			28 + GPIO_C_BASE //output
#define SYSTEM_LED_1			29 + GPIO_C_BASE //output
#define SYSTEM_LED_2			30 + GPIO_C_BASE //output
#define BP_FAN_ERRSIG			31 + GPIO_C_BASE

// GPIO E
#define GPIO_E_BASE			GPIO_C_BASE + 32
#define BP_PCB_VER_0			0 + GPIO_E_BASE
#define BP_HBUS_CTRL_0			1 + GPIO_E_BASE //output
#define BP_HBUS_CTRL_1			2 + GPIO_E_BASE //output
#define BP_HBUS_CTRL_2			3 + GPIO_E_BASE //output
#define BP_HBUS_CTRL_3			4 + GPIO_E_BASE //output
#define BP_PCB_VER_1			5 + GPIO_E_BASE
#define BP_PCB_VER_2			6 + GPIO_E_BASE
#define BP_HBUS_CTRL_4			7 + GPIO_E_BASE //output
#define BP_SW_RST_0			8 + GPIO_E_BASE //output
#define BP_SW_RST_1			9 + GPIO_E_BASE //output
#define BP_SW_RST_2			10 + GPIO_E_BASE //output
#define BP_PCB_VER_3			11 + GPIO_E_BASE
#define TRUNK_VER_0			12 + GPIO_E_BASE
#define BP_SW_RST_3			13 + GPIO_E_BASE //output
#define BP_SW_RST_4			14 + GPIO_E_BASE //output
#define BP_ALARM_1			15 + GPIO_E_BASE //output
#define BP_ALARM_2			16 + GPIO_E_BASE //output
#define TRUNK_VER_1			17 + GPIO_E_BASE
#define TRUNK_VER_2			18 + GPIO_E_BASE
#define ALL_BUS_ENABLE			19 + GPIO_E_BASE //output
#define ETH_RST				20 + GPIO_E_BASE //output
#define BP_FAN_ENABLE			21 + GPIO_E_BASE //output
#define GIGA_RST			22 + GPIO_E_BASE //output
#define TRUNK_VER_3			23 + GPIO_E_BASE

#define MAX_GPIO_NUM			96

extern UMAP_S32 FW_ReadGpio(UMAP_U8* value, UMAP_U8 addr);
extern UMAP_S32 FW_WriteGpio(UMAP_U8 value, UMAP_U8 addr);

//----------------------------------------------------------------------
#endif // FW_API_I2C_H_




